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  may 2006 1 mic5891 mic5891 micrel, inc. mic5891 features ? high-voltage, high-current outputs ? output transient protection diodes ? cmos-, pmos-, nmos-, and ttl-compatible inputs ? 5mhz typical data input rate ? low-power cmos latches applications ? alphanumeric and bar graph displays ? led and incandescent displays ? relay and solenoid drivers ? other high-power loads general description the mic5891 latched driver is a high-voltage, high current integrated circuit comprised of eight cmos data latches, cmos control circuitry for the common strobe and out- put enable, and bipolar darlington transistor drivers for each latch. bipolar/mos construction provides extremely low power latches with maximum interface ?exibility. the mic5891 will typically operate at 5mhz with a 5v logic supply. the cmos inputs are compatible with standard cmos, pmos, and nmos logic levels. ttl circuits may be used with appropriate pull-up resistors to ensure a proper logic- high input. a cmos serial data output allows additional drivers to be cascaded when more than 8 bits are required. the mic5891 has open-emitter outputs with suppression diodes for protection against inductive load transients. the output transistors are capable of sourcing 500ma and will sustain at least 35v in the on-state. simultaneous operation of all drivers at maximum rated current requires a reduction in duty cycle due to package power limitations. outputs may be paralleled for higher load current capability. the mic5891 is available in a 16-pin plastic dip package (n) and 16-pin wide soic package (wm). 8-bit serial-input latched source driver functional diagram micrel, inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel + 1 (408) 944-0800 ? fax + 1 (408 ) 474-1000 ? http://www.micrel.com out 1 out 2 out 3 out 4 out 5 out 6 out 7 out 8 serial data outoutput enable clock serial data in strobe ground 8-bit serial parallel shift register latches mos b i p o l a r downloaded from: http:///
mic5891 2 may 2006 mic5891 micrel, inc. typical circuits in v dd typical output circuit v bb v out typical input circuit 0 0.5 1 1.5 2 2.5 25 50 75 100 125 150 package power dissipation (w) ambient temperature (c) allowable package power dissipation vs. temp. pdip ja = 60c/w cerdip ja = 90c/w strobe 4 serial data in 3 clock 2 ground 1 out 3 7 out 2 6 out 1 5 out 4 8 load supply 13 outputenable 14 logic supply 15 serialdata out 16 out 6 10 out 7 11 out 8 12 out 5 9 v bb v dd oe shift register latches pin con?guration ordering information part number temperature range package standard pb-free mic5891bn mic5891yn C40oc to +85oc 16-pin plastic dip mic5891bwm mic5891ywm C40oc to +85oc 16-pin wide soic downloaded from: http:///
may 2006 3 mic5891 mic5891 micrel, inc. electrical characteristicsv bb = 50v, v dd = 5v to 12v; t a = +25c; unless noted. limits characteristic symbol v bb test conditions min. max. units output leakage current i cex 50v t a = +25c C50 a t a = +85c C100 a output saturation voltage v ce(sat) 50v i out = C100ma, t a = +85c 1.8 v i out = C225ma, t a = +85c 1.9 v i out = C350ma, t a = +85c 2.0 v output sustaining voltage v ce(sus) 50v i out = C350ma, l = 2mh 35 v input voltage v in(1) 50v v dd = 5.0v 3.5 v dd +0.3 v v dd = 12v 10.5 v dd +0.3 v v in(0) 50v v dd = 5v to 12v v ss C0.3 0.8 v input current i in(1) 50v v dd = v in = 5.0v 50 a v dd = 12v 240 a input impedance z in 50v v dd = 5.0v 100 k v dd = 12v 50 k maximum clock frequency f c 50v 3.3 mhz serial data output resistance r out 50v v dd = 5.0v 20 k v dd = 12v 6.0 k turn-on delay t plh 50v output enable to output, i out = C350ma 2.0 s turnoff delay t phl 50v output enable to output, i out = C350ma 10 s supply current i bb 50v all outputs on, all outputs open 10 ma all outputs off 200 a i dd 50v v dd = 5v, all outputs off, inputs = 0v 100 a v dd = 12v, all outputs off, inputs = 0v 200 a v dd = 5v, one output on, all inputs = 0v 1.0 ma v dd = 12v, one output on, all inputs = 0v 3.0 ma diode leakage current i h max t a = +25c 50 a t a = +85c 100 a diode forward voltage v f open i f = 350ma 2.0 v note 4: positive (negative) current is de?ned as going into (coming out of) the speci?ed device pin. note 5: operation of these devices with standard ttl may require the use of appropriate pull-up resistors. absolute maximum ratings (notes 1, 2, 3) output voltage (v out ) .................................................50v logic supply voltage range (v dd ) ................ 4.5v to 15v load supply voltage range (v bb ) ................. 5.0v to 50v input voltage range (v in ) ................................... C0.3v to v dd +0.3v continuous collector current (i c ) .......................... 500ma package power dissipation .............................. see graph operating temperature range (t a ) ....... C55c to +125c storage temperature range (t s ) .......... C65c to +150c note 1: t a = 25c note 2: derate at the rate of 20mw/c above t a = 25c. note 3: micrel cmos devices have input-static protection b ut are susceptible to damage when exposed to extremely high static electrical charges. 8 53% 47% 41% 7 60% 54% 48% 6 70% 64% 56% 5 83% 75% 67% 4 100% 94% 84% 3 100% 100% 100% 2 100% 100% 100% 1 100% 100% 100% 50c 60c 70c number of outputs on at i out = C200 ma max. allowable duty cycles at t a of: allowable duty cycles downloaded from: http:///
mic5891 4 may 2006 mic5891 micrel, inc. clock data in strobeoutput enable out n b d f e c g a h i timing conditions timing conditions (v dd = 5.0v, logic levels are v dd and ground) a. minimum data active time before clock pulse (data set-up time) .................................. .......................................75ns b. minimum data active time after clock pulse (data hold time) ..................................... ..........................................75ns c. minimum data pulse width ........................................................................ .........................................................150ns d. minimum clock pulse width ....................................................................... .........................................................150ns e. minimum time between clock activation and strobe ................................................ ..........................................300ns f. minimum strobe pulse width ...................................................................... ........................................................100ns g. typical time between strobe activation and output transition .................................... .........................................1.0s h. turnoff delay ................................................................................... .............................. see electrical characteristics i. turn-on delay ................................................................................... ............................. see electrical characteristics downloaded from: http:///
may 2006 5 mic5891 mic5891 micrel, inc. applications information serial data present at the input is transferred into the shift register on the rising edge of the clock input puls e. additional clock pulses shift data information towards the serial data output. the serial data must appear at the input prior to the rising edge of the clock input waveform. the 8 bits present in the shift register are transferred to the respective latches when the strobe is high (serial- to-parallel conversion). the latches will continue to accept new data as truth table serial shift register contents serial latch contents output content data clock data strobe output input input i 1 i 2 i 3 i n-1 i n output input i 1 i 2 i 3 i n-1 i n enable i 1 i 2 i 3 i n-1 i n h h r 1 r 2 r n-2 r n-1 r n-1 l l r 1 r 2 r n-2 r n-1 r n-1 x r 1 r 2 r 3 r n-1 r n r n x x x x x x l r 1 r 2 r 3 r n-1 r n p 1 p 2 p 3 p n-1 p n p n h p 1 p 2 p 3 p n-1 p n l p 1 p 2 p 3 p n-1 p n x x x x x h l l l l l l = low logic level h = high logic level x = irrelevant p = present state r = previous state long as the strobe is held high. most applications where the latching feature is not used (strobe tied high) require the output enable input to be high during serial data entry. outputs are active (controlled by the latch state) when the output enable is low. all outputs are low (disabled) when the output enable is high. output enable does not affect the data in the shift register or latch. downloaded from: http:///
mic5891 6 may 2006 mic5891 micrel, inc. package information 0.020 (0.508) 0.018 0.003 (0.457 0.076) lead?#1 0.780 (19.812) .250 0.005 (6.350 0.127) 0.025 0.015 (0.635 0.381) 0.100 0.010 (2.540 0.254) max 0.030-0.1 10 (0.762-2.794) rad 0.125 (3.175) min 0.020 (0.508) min 0.130 0.005 (3.302 0.127) +0.025 C0.015 +0.635 C0.381 0.3258.255 ( ) 0.009-0.015 (0.229-0.381) 0 -10 0.290-0.320 (7.336-8.128) 0.040 (1.016) typ 16-pin plastic dip (n) 16-pin wide soic (wm) downloaded from: http:///
may 2006 7 mic5891 mic5891 micrel, inc. micrel inc. 2180 fortune drive san jose, ca 95131 usa tel + 1 (408) 944-0800 fax + 1 (408) 474-1000 web http://www.micrel.com this information furnished by micrel in this data sheet is believed to be accurate and reliable. however no responsibility is assumed by micrel for its use. micrel reserves the right to change circuitry and speci?cations at any time without noti?cation to t he customer. micrel products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a signi?cant injury to the user. a purchaser's use or sale of micrel products for use in life support appliances, devices or systems is a purchaser's own risk and purchaser agrees to fully indemnify micrel for any damages resulting from such use or sale. ? 1997 micrel, inc. downloaded from: http:///


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